| S.No. |
Title |
Page No. |
Downloads |
| 1. |
DESIGN OF LOW POWER HIGH PERFORMANCE JK FLIP
FLOP
Pinki, Rajesh Mehra
|
1-4 |
 |
| 2. |
HIGHER EDUCATION AND EMERGING TECHNOLOGIES:
RETHINKING THE LEARNING EXPERIENCE
Dr. Surinder Kaur
|
5-7 |
|
| 3. |
USING ICT IN EMPOWERING TEACHERS FOR QUALITY
EDUCATION
Dr. (Mrs.) Navdeep Kaur
|
8-12 |
|
| 4. |
STUDY OF EFFECT OF IRON POWDER IN CARBOTHERMAL
REDUCTION OF BARITES
Jyotsna Agarwal
|
13-15 |
|
| 5. |
GENERATION OF HYBRID POWER BY WIND AND SOLAR
COGENERATION TECHNIQUES
K. Manoj Sharma, Y. Sruthi Spandana, L. Naveen Krishna
|
16-18 |
|
| 6. |
PERFORMANCE ANALYSIS OF CI ENGINE USING BIO
DIESEL
Harsh Rai , Sanjay Srivastava
|
19-22 |
|
| 7. |
LAYOUT DESIGN AND SIMULATION OF CMOS MULTIPLEXER
Priti Gupta, Rajesh Mehra
|
23-27 |
|
| 8. |
INTERNET OF THINGS ADVANCEMENT IN DEFENCE
Gopal Singh
|
28-37 |
|
| 9. |
A CONCEPTUAL ANALYSIS OF INFLUENCE OF
SUPERVISOR FEEDBACK ON EMPLOYEE RODUCTIVITY
Mrs. B. Swathi
|
38-42 |
|
| 10. |
DESIGN AND PERFORMANCE ANALYSIS OF AREA
EFFICIENT CMOS DECODER CIRCUIT
Vanshikha Singh, Rajesh Mehra
|
43-48 |
|
| 11. |
INFORMATION SYSTEMS
Deepak Sharma, Deepa Sharma, Jai Prakash Sharma
|
49-51 |
|
| 12. |
LOW POWER AND AREA EFFICIENT FULL ADDER
LAYOUT DESIGN USING 32 NM CMOS TECHNOLOGY
Shashi Kant Sharma, Rajesh Mehra
|
52-56 |
|
| 13. |
AREA AND POWER EFFICIENT LAYOUT DESIGN OF CMOS
SCHMITT TRIGGER
Ghulam Ahmad Raza, Rajesh Mehra
|
57-60 |
|
| 14. |
ENERGY HARVESTING AND HOME AUTOMATION
Sourabh Dey
|
61-67 |
|
| 15. |
DESIGN ANALYSIS OF 1-BIT CMOS COMPARATOR
Mehmood ul Hassan, Rajesh Mehra
|
68-72 |
|
| 16. |
A NOBEL DESIGN OF MONITORING AND CONTROL OF A
BOILER DRUM LEVEL BY FUZZY PID ADAPTIVE CONTROLLER USING LABVIEW
Ravi Kumar Sahu, Sachin Tyagi, Suresh Chandra Gupta
|
73-76 |
|
| 17. |
REVIEW OF PLANAR MICROSTRIP FILTERS FOR WIRELESS
COMMUNICATION
Kavya Gupta, Mrs.Navita singh, Dr.Arun Kumar
|
77-83 |
|
| 18. |
AREA EFFICIENT LAYOUT DESIGN ANALYSIS OF CMOS
BARRREL SHIFTER
Renuka Verma, Rajesh Mehra
|
84-89 |
|
| 19. |
LOW POWER & AREA EFFICIENT LAYOUT ANALYSIS OF
CMOS ENCODER
Tanuj Yadav, Rajesh Mehra
|
90-94 |
|
| 20. |
CMOS 4-BIT MULTIPLIER DESIGN & SIMULATION USING
DIFFERENT FOUNDRY
Pranay Kumar Rahi, Rajesh Mehra
|
95-98 |
|
| 21. |
A STUDY OF IMPACT OF ICT ON LIBRARY USERS AND
LIBRARY SERVICES
Mr. Surendra Singh, Dr. S.V.S. Rana
|
99-101 |
|
| 22. |
AREA AND POWER EFFICIENT CMOS DE-MULTIPLEXER
LAYOUT ON 90NM TECHNOLOGY
Saseendran T K, Rajesh Mehra
|
102-105 |
|
| 23. |
INNOVATION IN TECHNOLOGY: A SILVER BULLET FOR
LANGUAGE LEARNING
Ms Ranjna Sharma, Dr Rupa Tyagi
|
106-108 |
|
| 24. |
FIBER OPTIC SOURCES
Beena Kashyap, Amit Kashyap
|
109-112 |
|
| 25. |
AN APPROACH OF SECURED ECOMMERCE TRANSACTION
MODEL WITHOUT USING ELECTRONIC PAYMENT CREDIT OR DEBIT CARD SYSTEM
Er.Manik Chand Panday, Er.Himanshu Goel, Er.Ajay Kumar Verma
|
113-116 |
|
| 26. |
ATTITUDE OF PROSPECTIVE TEACHERS TOWARDS THE
USE OF INFORMATION AND COMMUNICATION TECHNOLOGY (ICT) IN TEACHER EDUCATION
Man Mohan Gupta
|
117-121 |
|
| 27. |
3- COIL STARTER USE FOR STARTING D.C MOTOR
Rohit Kumar
|
122-124 |
|
| 28. |
EXPERIMENTAL STUDY OF CONVECTIVE HEAT
TRANSFER IN MINIATURE DOUBLE TUBE HAIR-PIN HEAT EXCHANGER
M Kumar, V K Yadav, B Verma, K K Srivastava
|
125-131 |
|
| 29. |
DESIGN OF CMOS INVERTER USING DIFFERENT ASPECT
RATIOS
Pankaj Gautam, Devesh Kaushik, Rahul Sharma, Gyan Prakash Pal
|
132-137 |
|
| 30. |
HAMMING CODE GENERATOR USING 45 NM CMOS
Deepika Gupta, Preeti Sharma, Puneet Kumar, Gyan Prakash Pal
|
138-141 |
|
| 31. |
KINETICS, ISOTHERMS AND MECHANISMS OF CR (VI)
ADSORPTION ONTO ACTIVATED DATE PALM TRUNK (DPT)
Dhruv Kumar Singh, Sunil Kumar Yadav
|
142-147 |
|
| 32. |
PREPARATION AND ADSORPTION PERFORMANCE OF A
NOVEL CHELATING RESIN CONTAINING PYROGALLOL RED
Anuradha Singh, C L Gehlot, D. K. Singh
|
148-153 |
|
| 33. |
LAYOUT DESIGN OF D FLIP FLOP FOR POWER AND AREA
REDUCTION
Praveen Kumar chakravarti, Rajesh Mehra
|
154-158 |
|
| 34. |
LAYOUT DESIGN SIMULATION OF AREA AND POWER
EFFICIENT 10 TG FULL SUBTRACTOR
Monica Singhal, Rajesh Mehra
|
159-163 |
|
| 35. |
BRAIN COMPUTER INTERFACE: NEXT GENERATION
THOUGHT FOR HUMAN DEVELOPMENT
Mayank Sehgal, Prateek Sharma, Piyush Yadav
|
164-168 |
|
| 36. |
AREA EFFICIENT CMOS LAYOUT DESIGN OF RING
COUNTER
Ankita Mahajan, Rajesh Mehra
|
169-172 |
|
| 37. |
AREA EFFICIENT LAYOUT DESIGN & ANALYSIS OF FULL
SUBTRACTOR
Anamika Sharma, Rajesh Mehra
|
173-177 |
|
| 38. |
REVIEW OF PERFORMANCE OF DIFFERENT SHAPES
(E,S,U) IN MICRO-STRIP PATCH ANTENNA
Harshu Arora, Kanika Jain, Shalu Rastogi
|
178-181 |
|
| 39. |
SYNTHESIS, CHARACTERIZATION AND ANTIMICROBIAL
ACTIVITY OF NEW N-SUBSTITUTED -3-CHLORO-2-AZETIDINONES
Vivek Kumar Joshi, Dr. Himanshu
|
182-186 |
|
| 40. |
RECOVERY AND RECONSTRUCTION AFTER
UTTARAKHAND DISASTER 2013
J D Nanda, Bhawana Pant, Shree Pal
|
187-190 |
|
| 41. |
APPLICATION OF BAYESIAN DECESION THEORY IN
MANAGEMENT RESEARCH PROBLEMS
Dr. (Prof.) Hitendra P. Dave, Krutarth H. Dave
|
191-195 |
|
| 42. |
SYNTHESIS, CHARACTERIZATION AND ANTI-OXIDANT
ACTIVITY OF AZETIDINONE DERIVATIVES
Dr. Himanshu, Prem S. Mishra, Rakhi Mishra, Vivek Kumar Joshi
|
196 |
|
|
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